Within hard disk drives (HDDs), a preamplifier or preamp is generally used to perform read and write operations with a magnetic head. Typically, for write operations, the preamplifier generates a current waveform that uses a DC current to polarize magnetic elements within the disk and overshoot components to compensate for frequency dependant attenuation in the interconnect between the head and preamp. Turning to FIGS. 1 and 2, an example of a conventional preamp 100 and its general operation for a write operation can be seen. Initially, a differential write signal WDX and WDY is applied to the input buffer 102, which is transferred to the duration generator 104. From this differential write signal WDX and WDY, the duration generator 104 produces differential signal NDLYX and NDLYY and a delayed differential signal DLYX and DLYY, which are provided to the pulse-shaping circuitry 108 through the signal buffers 106 within the writer head 105. The pulse-shaping circuitry 108 then produces DC current signals IDCX and IDCY and boost current signals IBSTX and IBSTY, which are used by the H-bridge 110 to generate the writer current waveform for the magnetic head or write signal WRITE.
For conventional preamps (such as preamp 100), a high voltage supply of about 8V or 10V is used to generate this writer current waveform, and, as shown in FIG. 3, this high voltage was usually applied in the pulse-shaping circuitry 108. Typically, the pulse-shaping circuitry 108 includes positive and negative portions, which respectively have a pulse generator 201-1 or 201-2, a current-to-voltage (I-V) converter 202-1 or 202-2, and amplifier 206-1 or 206-2. This pulse-shaping circuitry 108 generates the positive and negative portions boost current signals IBSTX-P/IBSTY-P and IBSTX-M/IBSTY-M. For the sake of simplicity, pulse generator 201-1, I-V converter 202-1, and amplifier 206-1 are described below, but the same description can apply to pulse generator 201-2, I-V converter 202-2, and amplifier 206-2.
Looking first to the pulse generator 201-1 (an example of which is shown in detail in FIG. 4), current commutators are stacked in a NAND-like fashion. Namely, there are three sets of differential pairs (i.e., transistors Q1 through Q6) that are driven by signals NDLYX, NDLYY, DLYX, and DLYY such that a current pulses are generated for signals IX-P and IY-P, respectively, during the internals when signs NDLYX and DLYY are logic high or “1” and when signs NDLYY and DLYX are logic high or “1.” This results in a voltage drop of 2VCE since at least two of transistors Q1 through Q6 (which are NPN transistors) are within each current or signal path. Also, because there is also a bias transistor Q7 (which receives a bias voltage BIAS) coupled within each current path, there is an additional voltage drop VCE, meaning that the topology would need headroom for 3VCE (plus the voltage drop across resistor R1) or approximately 3V.
Typically, these currents IX-P and IY-P are then converted to voltages with I-V converter 202-1 and converted into boost current signals IBSTX-P and IBSTY-P by amplifier 206-1. Each of the I-V converter 202-1 and amplifier 206-1 generally includes two sections or portions: one for current IX-P and one for IY-P. As shown in FIG. 5, each portion of the I-V converter 202-1 is generally comprised of a “diode stack” and resistor, and each portion of the amplifier 206-1 is generally a two stage class AB amplifier (which generally includes transistors Q7-Q9 and resistor R3. The first stage of each portion of the amplifier 206-1 (which generally includes a push-pull amplifier having transistors Q7 and Q8) increases the current from 1 to α. The resistor and diodes in the corresponding portion of I-V converter 202-1 provides a voltage drop of 2VCE plus a voltage drop across the resistor, resulting in the need for additional headroom for 2VCE plus a resistor voltage drop (totaling about 6V across the pulse generator 201-1 and the I-V converter 202-1). This would mean that the total supply voltage would be greater than 6V, and for this example, supply rail VCC would be 5V and supply rail VEE would be −3V. The second stage of each portion of amplifier 206-1 (which generally includes common emitter amplifier having transistor Q9 and resistor R3) increases the current from α to α2 to generate boost current signals IBSTX-P or IBSTY-P.
A drawback from this arrangement, however, is that it uses high power (i.e., 8V) due in part the voltage drop of 5VCE plus a resistor voltage drop in the pulse-shaping circuitry 108. Therefore, there is a need for pulse-shaping circuitry that can operate at lower voltages.
Some other conventional circuits are: U.S. Pat. No. 7,786,754; U.S. Patent Pre-Grant Publ. No. 2010/0246048; and European Patent No. EP0980065.